The present invention relates to an amplifier for switching a gain depending on the level of an input signal, and particularly to a variable gain amplifier which can be effectively applied to a receiver for wireless communication.
In a wireless mobile communication system such as a mobile telephone or the like which has already formed a wide industrial market, communications are realized using the frequency of GHz band. An amplifier of the receiver used in the GHz band for wireless communication is designed to assure high sensitivity and to obtain good linearity. For example, an amplifier, which can switch the gain thereof, namely provide a high gain when an input signal is low level and a low gain when an input signal is high level, is employed. With the switching of gain, distortion of signal due to saturation of circuit can be suppressed and more excellent linearity can be obtained.
The first example of the existing gain switching amplifier, namely variable gain amplifier is illustrated in FIG. 9. In this example, the current sources 201-1, 201-2, 201-3 of different current values are switched with the ON/OFF operation of the switches 203-1, 203-2, 203-3 under the control of a selection circuit (SEL) 103 for three differential amplifiers consisting of loads (ZL) 104p, 104n, transistors 202p-1, 202n-1, transistors 202p-2, 202n-2 and transistors 202p-3, 202n-3. A differential input signal to the input terminals 101p, 101n is amplified and outputted to the output terminals 102p, 102n. 
A gain of amplifier is determined with product of a mutual conductance gm of transistor and an impedance of a load 104, but since the mutual conductance gm corresponds to an operation current of transistor, a gain of amplifier can be switched through the switching of a current source 201. Since the mutual conductance gm also corresponds to an element size of transistor, a method for switching the gain by introducing transistors of different sizes into the three differential amplifiers can also be introduced. The amplifier for switching a current or a size of element is disclosed, for example, in the Japanese Patent Laid-Open (Kokai) No. Hei 11-177357. In above amplifier, since constants of a transistor change depending on the switching of a current or an element size, an input impedance and an output impedance of the amplifier change whenever the switching is conducted.
The second example of the existing gain switching amplifier is illustrated in FIG. 10. This amplifier includes, between the input terminal 101 and output terminal 102, a plurality of paths consisting of a voltage-input/voltage-output type amplifier (hereinafter referred to as Vxe2x80x94V amplifier) 106a of the gain A0 and a Vxe2x80x94V amplifier 106b of the gain A1 (A0 greater than A1).
The selection circuit 103 obtains information of an input signal amplitude from an external circuit of the amplifier and controls a bias circuit (BC) 107. When the input signal amplitude is low, the selection circuit 103 supplies a bias voltage to the Vxe2x80x94V amplifier 106a of high gain from the bias circuit 107 to select the path including the Vxe2x80x94V amplifier 106a of high gain by cutting the bias voltage of the Vxe2x80x94V amplifier 106b of low gain. When the input signal amplitude is high, the path including the Vxe2x80x94V amplifier 106b of low gain is selected. Such amplifier is disclosed in the Japanese Patent Laid-Open (Kokai) No. 2001-223549. Even in this example, since the mutual conductance gm is varied by changing an element size of transistor forming the amplifier 106 or a current flowing into the transistor, the input impedance and output impedances when the gain is switched vary to a large extent.
As the third example of the existing gain switching amplifier, the amplifier disclosed in the Japanese Patent Laid-Open (Kokai) No. Hei 11-284460 is illustrated in FIG. 11. This example is constituted of an amplifier unit 810 and a level detecting unit 811 having a plurality of paths allocated between the input terminal 101 and output terminal 102 via a change-over switch 105, namely a path of the Vxe2x80x94V amplifier 801a, a path of cascade connection of the Vxe2x80x94V amplifier 801b and Vxe2x80x94V amplifier 802b and a path of cascade connection of the Vxe2x80x94V amplifier 801c, Vxe2x80x94V amplifier 802c and Vxe2x80x94V amplifier 803c. The Vxe2x80x94V amplifier 801 has the gain A0, while the Vxe2x80x94V amplifier 802 has the gain Al and the Vxe2x80x94V amplifier 803 has the gain A2, respectively.
The level detecting unit 811 is constituted of the path of cascade connection of the Vxe2x80x94V amplifier 801x, Vxe2x80x94V amplifier 802x and Vxe2x80x94V amplifier 803x having the identical electrical characteristics as those explained above and a level detector (DET) 116. Any path of the amplifier unit 810 is selected depending on the detection result.
The circuit of this example changes an input impedance and an output impedance through the switching as in the case of the first and second examples. An input impedance changes at a higher frequency influenced by a coupling capacitance between the input side and output side when a load side of a preamplifier 801 changes with the switching operation. Moreover, since this example is based on the installation of the level detecting unit 811 using the same Vxe2x80x94V amplifier as the amplifier unit 810 from the structural viewpoint, physical configuration of circuit becomes large and a current dissipation is also large and moreover installation of the change-over switch 105 accompanied by deterioration of signal is essential.
In a receiver for wireless communication, it is very important that impedance matching is attained between a variable gain amplifier and a preceding stage thereof (for example, antenna) and impedance matching is also attained between the variable gain amplifier and a subsequent stage thereof (for example, mixer). If such impedance matching is not attained, signal loss and noise increase due to generation of reflection in the signal to be transmitted and thereby sensitivity is deteriorated.
In the existing variable gain amplifier explained above, it is not considered that unmatching is generated due to the change of input and output impedances when the switching of gain is conducted. Particularly, in the method for changing a circuit parameter such as an element size or a current flowing into the element, an input impedance and an output impedance change largely. Therefore a degree of mismatching becomes large in order to change the gain.
Moreover, deterioration of sensitivity due to the switching loss cannot be neglected in the system for changing the path with a switch connected in series to the signal path.
It is therefore an object of the present invention to provide a high sensitivity variable gain amplifier which can maintain the excellent matching condition by suppressing an impedance change due to the switching of gain.
The object of the present invention can be effectively achieved by introducing a structure in which at least one path comprising at least a stage of the voltage-input/voltage-output amplifier+a stage of voltage-input/current-output amplifier and a path comprising a stage of the voltage-input/current-output amplifier are connected in parallel between the input terminal and output terminal or, a structure in which a plurality of paths each comprising at least a stage of voltage-input/voltage-output amplifier+a stage of voltage-input/current-output amplifier are connected in parallel between the input terminal and output terminal, and by switching the gain by selecting and operating any one path among the paths explained above. And then, it is desirable to keep, even when any path is selected, the input impedance viewed from the input terminal almost unchanged or the output impedance viewed from the output terminal unchanged.
An input impedance and an output impedance explained above can be realized, for example, on selecting any one of paths through control of bias voltages given to control electrodes of transistors forming a voltage-input/voltage-output amplifier and a voltage-input/current-output amplifier, by equalizing an element size of an input transistor connected to the input terminal, the input transistor being included in the transistors, and also equalizing a bias voltage when the path is selected given to the control electrode of the input transistor, or by equalizing an element size of an output transistor connected to the output terminal, the output transistor being included in the transistors, and also equalizing a bias voltage when the path is selected given to the control electrode of the output transistor, or by introducing a cascode structure of transistor.
These and other objects and many of the attendant advantages of the invention will be readily appreciated as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings.